Table k=3 t=2 m=4 |
v,k,t,m | B | Combs | Author | Date | note | Lower Bound |
5,3,2,4 |
1 | | Trivial (1 block) | 7-lug-2017 | | 1 |
6,3,2,4 |
2 | | Trivial (2 blocks) | 7-lug-2017 | | 2 |
7,3,2,4 |
2 | - Invers(07,04,02,03) | Trivial (2 blocks) | 7-lug-2017 | | 2 |
8,3,2,4 |
3 | - Invers(08,05,03,04) | Trivial (3 blocks) | 7-lug-2017 | | 3 |
9,3,2,4 |
3 | - Invers(09,06,04,05) | Trivial (3 blocks) | 7-lug-2017 | | 3 |
10,3,2,4 |
5 | - Invers(10,07,05,06) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
11,3,2,4 |
6 | - Invers(11,08,06,07) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
12,3,2,4 |
8 | - Invers(12,09,07,08) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 8 |
13,3,2,4 |
9 | - Invers(13,10,08,09) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
14,3,2,4 |
11 | - Invers(14,11,09,10) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 11 |
15,3,2,4 |
12 | - Invers(15,12,10,11) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 12 |
16,3,2,4 |
14 | - Invers(16,13,11,12) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 14 |
17,3,2,4 |
15 | - Invers(17,14,12,13) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
18,3,2,4 |
17 | - Invers(18,15,13,14) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 17 |
19,3,2,4 |
18 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 18 |
20,3,2,4 |
20 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 20 |
21,3,2,4 |
21 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 21 |
22,3,2,4 |
25 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 24 |
23,3,2,4 |
26 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 26 |
24,3,2,4 |
30 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 28 |
25,3,2,4 |
31 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 31 |
26,3,2,4 |
35 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 34 |
27,3,2,4 |
36 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 36 |
28,3,2,4 |
41 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 39 |
29,3,2,4 |
43 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 42 |
30,3,2,4 |
48 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 45 |
31,3,2,4 |
50 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 49 |
32,3,2,4 |
55 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 52 |
33,3,2,4 |
57 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 55 |
34,3,2,4 |
62 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 59 |
35,3,2,4 |
64 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 63 |
36,3,2,4 |
69 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 66 |
37,3,2,4 |
71 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 70 |
38,3,2,4 |
76 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 74 |
39,3,2,4 |
78 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 78 |
40,3,2,4 |
85 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 83 |
41,3,2,4 |
87 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 87 |
42,3,2,4 |
94 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 91 |
43,3,2,4 |
96 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 96 |
44,3,2,4 |
103 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 101 |
45,3,2,4 |
105 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 105 |
46,3,2,4 |
113 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 110 |
47,3,2,4 |
116 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 115 |
48,3,2,4 |
124 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 120 |
49,3,2,4 |
127 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 126 |
50,3,2,4 |
135 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 131 |
51,3,2,4 |
138 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 136 |
52,3,2,4 |
146 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 142 |
53,3,2,4 |
149 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 148 |
54,3,2,4 |
157 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 153 |
55,3,2,4 |
160 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 159 |
56,3,2,4 |
168 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 165 |
57,3,2,4 |
171 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 171 |
58,3,2,4 |
181 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 178 |
59,3,2,4 |
184 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 184 |
60,3,2,4 |
194 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 190 |
61,3,2,4 |
197 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 197 |
62,3,2,4 |
207 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 204 |
63,3,2,4 |
210 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 210 |
64,3,2,4 |
221 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 217 |
65,3,2,4 |
225 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 224 |
66,3,2,4 |
236 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 231 |
67,3,2,4 |
240 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 239 |
68,3,2,4 |
251 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 246 |
69,3,2,4 |
255 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 253 |
70,3,2,4 |
266 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 261 |
71,3,2,4 |
270 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 269 |
72,3,2,4 |
281 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 276 |
73,3,2,4 |
285 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 284 |
74,3,2,4 |
296 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 292 |
75,3,2,4 |
300 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 300 |
76,3,2,4 |
313 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 309 |
77,3,2,4 |
317 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 317 |
78,3,2,4 |
330 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 325 |
79,3,2,4 |
334 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 334 |
80,3,2,4 |
347 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 343 |
81,3,2,4 |
351 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 351 |
82,3,2,4 |
365 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 360 |
83,3,2,4 |
370 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 369 |
84,3,2,4 |
384 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 378 |
85,3,2,4 |
389 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 388 |
86,3,2,4 |
403 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 397 |
87,3,2,4 |
408 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 406 |
88,3,2,4 |
422 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 416 |
89,3,2,4 |
427 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 426 |
90,3,2,4 |
441 | | Alessandro Jurcovich | 8-giu-2018 | reproposed | 435 |