Table k=3 t=2 m=6
v,k,t,m	B	Combs	Author	Date	note	Lower Bound
7,3,2,6	1		Trivial (1 block)	7-lug-2017		1
8,3,2,6	2		Trivial (2 blocks)	7-lug-2017		2
9,3,2,6	2	- Invers(09,06,02,03)	Trivial (2 blocks)	7-lug-2017		2
10,3,2,6	3	- Invers(10,07,03,04)	Trivial (3 blocks)	7-lug-2017		3
11,3,2,6	3	- Invers(11,08,04,05)	Trivial (3 blocks)	7-lug-2017		3
12,3,2,6	4	- Invers(12,09,05,06)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	4
13,3,2,6	4	- Invers(13,10,06,07)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	4
14,3,2,6	5	- Invers(14,11,07,08)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	5
15,3,2,6	5	- Invers(15,12,08,09)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	5
16,3,2,6	7	- Invers(16,13,09,10)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	7
17,3,2,6	8	- Invers(17,14,10,11)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	8
18,3,2,6	10	- Invers(18,15,11,12)	already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	10
19,3,2,6	11		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	11
20,3,2,6	13		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	13
21,3,2,6	14		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	13
22,3,2,6	16		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	13
23,3,2,6	17		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	14
24,3,2,6	19		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	16
25,3,2,6	20		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	17
26,3,2,6	22		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	19
27,3,2,6	23		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	20
28,3,2,6	25		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	22
29,3,2,6	26		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	24
30,3,2,6	28		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	25
31,3,2,6	29		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	27
32,3,2,6	31		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	29
33,3,2,6	32		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	31
34,3,2,6	34		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	33
35,3,2,6	35		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	35
36,3,2,6	39		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	38
37,3,2,6	40		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	40
38,3,2,6	44		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	42
39,3,2,6	45		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	45
40,3,2,6	49		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	47
41,3,2,6	50		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	50
42,3,2,6	54		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	52
43,3,2,6	55		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	55
44,3,2,6	59		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	58
45,3,2,6	60		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	60
46,3,2,6	65		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	63
47,3,2,6	67		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	66
48,3,2,6	72		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	69
49,3,2,6	74		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	72
50,3,2,6	79		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	75
51,3,2,6	81		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	79
52,3,2,6	86		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	82
53,3,2,6	88		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	85
54,3,2,6	93		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	89
55,3,2,6	95		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	92
56,3,2,6	100		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	96
57,3,2,6	102		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	99
58,3,2,6	107		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	103
59,3,2,6	109		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	107
60,3,2,6	114		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	110
61,3,2,6	116		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	114
62,3,2,6	121		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	118
63,3,2,6	123		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	122
64,3,2,6	128		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	126
65,3,2,6	130		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	130
66,3,2,6	137		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	135
67,3,2,6	139		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	139
68,3,2,6	146		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	143
69,3,2,6	148		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	148
70,3,2,6	155		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	152
71,3,2,6	157		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	157
72,3,2,6	164		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	161
73,3,2,6	166		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	166
74,3,2,6	173		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	171
75,3,2,6	175		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	175
76,3,2,6	183		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	180
77,3,2,6	186		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	185
78,3,2,6	194		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	190
79,3,2,6	197		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	195
80,3,2,6	205		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	200
81,3,2,6	208		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	206
82,3,2,6	216		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	211
83,3,2,6	219		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	216
84,3,2,6	227		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	222
85,3,2,6	230		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	227
86,3,2,6	238		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	233
87,3,2,6	241		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	238
88,3,2,6	249		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	244
89,3,2,6	252		already known design - Rebuilt by LDDr	16-mag-2018	Sum (v1+v2,k,t,m1+m2-1	250
90,3,2,6	260		Alessandro Jurcovich	8-giu-2018	reproposed	255