Table k=3 t=3 m=7
v,k,t,mBCombsAuthorDatenoteLower Bound
8,3,3,7 2Trivial (2 blocks)7-lug-20172
9,3,3,7 3 - Invers(09,06,02)Trivial (3 blocks)7-lug-20173
10,3,3,7 6Invers(10,07,03)6
11,3,3,7 9Invers(11,08,04)9
12,3,3,7 12Invers(12,09,05)12
13,3,3,7 16Invers(13,10,06)16
14,3,3,7 22Invers(14,11,07)22
15,3,3,7 30Invers(15,12,08)30
16,3,3,7 39already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)37
17,3,3,7 49already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)45
18,3,3,7 60already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-154
19,3,3,7 72already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)65
20,3,3,7 87already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)77
21,3,3,7 105already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)90
22,3,3,7 124already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)105
23,3,3,7 145already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)121
24,3,3,7 168already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-1139
25,3,3,7 192already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)158
26,3,3,7 220already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)179
27,3,3,7 252already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)202
28,3,3,7 284already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)227
29,3,3,7 320already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)254
30,3,3,7 360already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-1283
31,3,3,7 400already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)314
32,3,3,7 445already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)347
33,3,3,7 495already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)382
34,3,3,7 545Stef7230-giu-2018419
35,3,3,7 600Stef7230-giu-2018459
36,3,3,7 660already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-1501
37,3,3,7 720already known design - Rebuilt by LDDr04-gen-2024Somma546
38,3,3,7 786already known design - Rebuilt by LDDr04-gen-2024Somma593
39,3,3,7 858already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)643
40,3,3,7 931already known design - Rebuilt by LDDr04-gen-2024Somma696
41,3,3,7 1009already known design - Rebuilt by LDDr04-gen-2024Somma751
42,3,3,7 1092already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-1809
43,3,3,7 1176already known design - Rebuilt by LDDr04-gen-2024Somma870
44,3,3,7 1267already known design - Rebuilt by LDDr04-gen-2024Somma934
45,3,3,7 1365already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)1001
46,3,3,7 1463already known design - Rebuilt by LDDr04-gen-2024Somma1071
47,3,3,7 1568already known design - Rebuilt by LDDr04-gen-2024Somma1145
48,3,3,7 1680already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-11222
49,3,3,7 1792already known design - Rebuilt by LDDr04-gen-2024Somma1302
50,3,3,7 1912already known design - Rebuilt by LDDr04-gen-2024Somma1386
51,3,3,7 2040already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)1473
52,3,3,7 2168already known design - Rebuilt by LDDr04-gen-2024Somma1564
53,3,3,7 2304already known design - Rebuilt by LDDr04-gen-2024Somma1658
54,3,3,7 2448already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-11756
55,3,3,7 2592already known design - Rebuilt by LDDr04-gen-2024Somma1858
56,3,3,7 2745already known design - Rebuilt by LDDr04-gen-2024Somma1964
57,3,3,7 2907already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)2074
58,3,3,7 3069already known design - Rebuilt by LDDr04-gen-2024Somma2188
59,3,3,7 3240already known design - Rebuilt by LDDr04-gen-2024Somma2306
60,3,3,7 3420already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-12428
61,3,3,7 3600already known design - Rebuilt by LDDr04-gen-2024Somma2554
62,3,3,7 3790already known design - Rebuilt by LDDr04-gen-2024Somma2684
63,3,3,7 3990already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)2819
64,3,3,7 4190already known design - Rebuilt by LDDr04-gen-2024Somma2958
65,3,3,7 4400already known design - Rebuilt by LDDr04-gen-2024Somma3102
66,3,3,7 4620already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-13250
67,3,3,7 4840already known design - Rebuilt by LDDr04-gen-2024Somma3403
68,3,3,7 5071already known design - Rebuilt by LDDr04-gen-2024Somma3561
69,3,3,7 5313already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)3723
70,3,3,7 5555already known design - Rebuilt by LDDr04-gen-2024Somma3890
71,3,3,7 5808already known design - Rebuilt by LDDr04-gen-2024Somma4062
72,3,3,7 6072already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-14239
73,3,3,7 6336already known design - Rebuilt by LDDr04-gen-2024Somma4421
74,3,3,7 6612already known design - Rebuilt by LDDr04-gen-2024Somma4608
75,3,3,7 6900already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)4800
76,3,3,7 7188already known design - Rebuilt by LDDr04-gen-2024Somma4998
77,3,3,7 7488already known design - Rebuilt by LDDr04-gen-2024Somma5201
78,3,3,7 7800already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-15410
79,3,3,7 8112already known design - Rebuilt by LDDr04-gen-2024Somma5624
80,3,3,7 8437already known design - Rebuilt by LDDr04-gen-2024Somma5844
81,3,3,7 8775already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)6069
82,3,3,7 9113already known design - Rebuilt by LDDr04-gen-2024Somma6300
83,3,3,7 9464already known design - Rebuilt by LDDr04-gen-2024Somma6537
84,3,3,7 9828already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-16780
85,3,3,7 10192already known design - Rebuilt by LDDr04-gen-2024Somma7029
86,3,3,7 10570already known design - Rebuilt by LDDr04-gen-2024Somma7284
87,3,3,7 10962already known design - Rebuilt by LDDr9-giu-2018Sum (v1+v2,k,t,m1+m2-1)7545
88,3,3,7 11354already known design - Rebuilt by LDDr04-gen-2024Somma7812
89,3,3,7 11760already known design - Rebuilt by LDDr04-gen-2024Somma8085
90,3,3,7 12180already known design - Rebuilt by LDDr16-mag-2018Sum (v1+v2,k,t,m1+m2-18364