| Table k=5 t=2 m=8 | ||||||
| v,k,t,m | B | Combs | Author | Date | note | Lower Bound |
| 9,5,2,8 | 1 |  | Trivial (1 block) | 7-lug-2017 | 1 | |
| 10,5,2,8 | 1 | | Trivial (1 block) | 7-lug-2017 | 1 | |
| 11,5,2,8 | 1 | | Trivial (1 block) | 7-lug-2017 | 1 | |
| 12,5,2,8 | 2 | | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 13,5,2,8 | 2 | - Invers(13,08,02,05) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 14,5,2,8 | 2 | - Invers(14,09,03,06) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 15,5,2,8 | 2 | - Invers(15,10,04,07) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 16,5,2,8 | 3 | - Invers(16,11,05,08) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 17,5,2,8 | 3 | - Invers(17,12,06,09) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 18,5,2,8 | 3 | - Invers(18,13,07,10) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 19,5,2,8 | 3 | - Invers(19,14,08,11) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 20,5,2,8 | 4 | - Invers(20,15,09,12) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 21,5,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 22,5,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 23,5,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 24,5,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 25,5,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 26,5,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 27,5,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 28,5,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 29,5,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 30,5,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 31,5,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 32,5,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 33,5,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 34,5,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 35,5,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 36,5,2,8 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 8 |
| 37,5,2,8 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 8 |
| 38,5,2,8 | 10 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 39,5,2,8 | 11 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 40,5,2,8 | 12 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 10 |
| 41,5,2,8 | 13 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 10 |
| 42,5,2,8 | 14 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 11 |
| 43,5,2,8 | 15 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 12 |
| 44,5,2,8 | 16 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 12 |
| 45,5,2,8 | 17 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 13 |
| 46,5,2,8 | 18 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 13 |
| 47,5,2,8 | 19 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 14 |
| 48,5,2,8 | 20 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
| 49,5,2,8 | 21 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
| 50,5,2,8 | 22 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 16 |
| 51,5,2,8 | 23 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 17 |
| 52,5,2,8 | 24 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 17 |
| 53,5,2,8 | 25 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 18 |
| 54,5,2,8 | 26 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 19 |
| 55,5,2,8 | 27 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 19 |
| 56,5,2,8 | 27 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 20 |
| 57,5,2,8 | 29 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 21 |
| 58,5,2,8 | 29 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 22 |
| 59,5,2,8 | 30 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 22 |
| 60,5,2,8 | 31 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 23 |
| 61,5,2,8 | 32 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 24 |
| 62,5,2,8 | 33 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 25 |
| 63,5,2,8 | 34 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 26 |
| 64,5,2,8 | 35 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 27 |
| 65,5,2,8 | 36 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 27 |
| 66,5,2,8 | 37 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 28 |
| 67,5,2,8 | 38 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 29 |
| 68,5,2,8 | 39 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 30 |
| 69,5,2,8 | 40 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 31 |
| 70,5,2,8 | 41 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 32 |
| 71,5,2,8 | 42 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 33 |
| 72,5,2,8 | 43 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 34 |
| 73,5,2,8 | 44 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 35 |
| 74,5,2,8 | 45 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 36 |
| 75,5,2,8 | 46 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 37 |
| 76,5,2,8 | 47 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 38 |
| 77,5,2,8 | 48 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 39 |
| 78,5,2,8 | 49 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 40 |
| 79,5,2,8 | 51 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 41 |
| 80,5,2,8 | 52 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 42 |
| 81,5,2,8 | 53 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 43 |
| 82,5,2,8 | 55 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 44 |
| 83,5,2,8 | 56 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 46 |
| 84,5,2,8 | 58 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 47 |
| 85,5,2,8 | 59 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 48 |
| 86,5,2,8 | 60 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 49 |
| 87,5,2,8 | 62 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 50 |
| 88,5,2,8 | 63 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 51 |
| 89,5,2,8 | 65 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 53 |
| 90,5,2,8 | 66 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 54 |