| Table k=6 t=2 m=8 | ||||||
| v,k,t,m | B | Combs | Author | Date | note | Lower Bound |
| 9,6,2,8 | 1 |  | Trivial (1 block) | 7-lug-2017 | 1 | |
| 10,6,2,8 | 1 | | Trivial (1 block) | 7-lug-2017 | 1 | |
| 11,6,2,8 | 1 | | Trivial (1 block) | 7-lug-2017 | 1 | |
| 12,6,2,8 | 1 | | Trivial (1 block) | 7-lug-2017 | 1 | |
| 13,6,2,8 | 2 | | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 14,6,2,8 | 2 | - Invers(14,08,02,06) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 15,6,2,8 | 2 | - Invers(15,09,03,07) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 16,6,2,8 | 2 | - Invers(16,10,04,08) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 17,6,2,8 | 2 | - Invers(17,11,05,09) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 18,6,2,8 | 3 | - Invers(18,12,06,10) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 19,6,2,8 | 3 | - Invers(19,13,07,11) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 20,6,2,8 | 3 | - Invers(20,14,08,12) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 21,6,2,8 | 3 | - Invers(21,15,09,13) | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 22,6,2,8 | 3 | | Trivial (3 blocks) | 7-lug-2017 | 3 | |
| 23,6,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 24,6,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 25,6,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 26,6,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 27,6,2,8 | 4 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 28,6,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 29,6,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 30,6,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 31,6,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 32,6,2,8 | 5 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 33,6,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 34,6,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 35,6,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 36,6,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 37,6,2,8 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 38,6,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 39,6,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 40,6,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 41,6,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 42,6,2,8 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 43,6,2,8 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 8 |
| 44,6,2,8 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 8 |
| 45,6,2,8 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 46,6,2,8 | 10 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 47,6,2,8 | 11 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 48,6,2,8 | 11 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 10 |
| 49,6,2,8 | 12 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 10 |
| 50,6,2,8 | 13 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 11 |
| 51,6,2,8 | 13 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 11 |
| 52,6,2,8 | 14 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 12 |
| 53,6,2,8 | 15 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 12 |
| 54,6,2,8 | 15 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 13 |
| 55,6,2,8 | 16 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 13 |
| 56,6,2,8 | 17 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 14 |
| 57,6,2,8 | 17 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 14 |
| 58,6,2,8 | 18 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
| 59,6,2,8 | 19 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
| 60,6,2,8 | 19 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 16 |
| 61,6,2,8 | 20 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 16 |
| 62,6,2,8 | 21 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 17 |
| 63,6,2,8 | 21 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 17 |
| 64,6,2,8 | 22 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 18 |
| 65,6,2,8 | 23 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 18 |
| 66,6,2,8 | 24 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 19 |
| 67,6,2,8 | 25 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 20 |
| 68,6,2,8 | 25 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 20 |
| 69,6,2,8 | 26 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 21 |
| 70,6,2,8 | 27 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 21 |
| 71,6,2,8 | 28 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 22 |
| 72,6,2,8 | 29 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 23 |
| 73,6,2,8 | 29 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 23 |
| 74,6,2,8 | 30 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 24 |
| 75,6,2,8 | 31 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 25 |
| 76,6,2,8 | 32 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 25 |
| 77,6,2,8 | 33 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 26 |
| 78,6,2,8 | 33 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 27 |
| 79,6,2,8 | 34 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 28 |
| 80,6,2,8 | 35 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 28 |
| 81,6,2,8 | 36 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 29 |
| 82,6,2,8 | 37 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 30 |
| 83,6,2,8 | 37 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 31 |
| 84,6,2,8 | 38 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 31 |
| 85,6,2,8 | 39 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 32 |
| 86,6,2,8 | 40 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 33 |
| 87,6,2,8 | 41 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 34 |
| 88,6,2,8 | 41 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 34 |
| 89,6,2,8 | 42 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 35 |
| 90,6,2,8 | 43 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 36 |