| Table k=8 t=2 m=3 | ||||||
| v,k,t,m | B | Combs | Author | Date | note | Lower Bound |
| 9,8,2,3 | 1 |  | Trivial (1 block) | 7-lug-2017 | 1 | |
| 10,8,2,3 | 2 | | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 11,8,2,3 | 2 | - Invers(11,03,02,08) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 12,8,2,3 | 2 | - Invers(12,04,03,09) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 13,8,2,3 | 2 | - Invers(13,05,04,10) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 14,8,2,3 | 2 | - Invers(14,06,05,11) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 15,8,2,3 | 2 | - Invers(15,07,06,12) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 16,8,2,3 | 2 | - Invers(16,08,07,13) | Trivial (2 blocks) | 7-lug-2017 | 2 | |
| 17,8,2,3 | 4 | - Invers(17,09,08,14) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 18,8,2,3 | 4 | - Invers(18,10,09,15) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 19,8,2,3 | 4 | - Invers(19,11,10,16) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 20,8,2,3 | 4 | - Invers(20,12,11,17) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 21,8,2,3 | 5 | - Invers(21,13,12,18) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 22,8,2,3 | 6 | - Invers(22,14,13,19) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 4 |
| 23,8,2,3 | 6 | - Invers(23,15,14,20) | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 24,8,2,3 | 6 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 5 |
| 25,8,2,3 | 7 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 26,8,2,3 | 8 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 6 |
| 27,8,2,3 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 28,8,2,3 | 9 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 29,8,2,3 | 10 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 7 |
| 30,8,2,3 | 10 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 8 |
| 31,8,2,3 | 11 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 32,8,2,3 | 12 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 9 |
| 33,8,2,3 | 13 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 10 |
| 34,8,2,3 | 13 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 10 |
| 35,8,2,3 | 14 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 11 |
| 36,8,2,3 | 14 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 11 |
| 37,8,2,3 | 16 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 12 |
| 38,8,2,3 | 16 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 13 |
| 39,8,2,3 | 17 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 13 |
| 40,8,2,3 | 18 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 14 |
| 41,8,2,3 | 19 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
| 42,8,2,3 | 19 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 15 |
| 43,8,2,3 | 20 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 16 |
| 44,8,2,3 | 20 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 17 |
| 45,8,2,3 | 22 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 18 |
| 46,8,2,3 | 22 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 19 |
| 47,8,2,3 | 24 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 19 |
| 48,8,2,3 | 24 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 20 |
| 49,8,2,3 | 25 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 21 |
| 50,8,2,3 | 25 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 22 |
| 51,8,2,3 | 26 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 23 |
| 52,8,2,3 | 26 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 24 |
| 53,8,2,3 | 30 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 25 |
| 54,8,2,3 | 30 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 26 |
| 55,8,2,3 | 31 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 27 |
| 56,8,2,3 | 32 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 27 |
| 57,8,2,3 | 33 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 28 |
| 58,8,2,3 | 33 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 29 |
| 59,8,2,3 | 37 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 31 |
| 60,8,2,3 | 37 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 32 |
| 61,8,2,3 | 38 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 33 |
| 62,8,2,3 | 39 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 34 |
| 63,8,2,3 | 40 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 35 |
| 64,8,2,3 | 40 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 36 |
| 65,8,2,3 | 44 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 37 |
| 66,8,2,3 | 45 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 38 |
| 67,8,2,3 | 46 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 39 |
| 68,8,2,3 | 47 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 41 |
| 69,8,2,3 | 48 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 42 |
| 70,8,2,3 | 49 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 43 |
| 71,8,2,3 | 52 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 44 |
| 72,8,2,3 | 53 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 45 |
| 73,8,2,3 | 54 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 47 |
| 74,8,2,3 | 55 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 48 |
| 75,8,2,3 | 57 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 49 |
| 76,8,2,3 | 58 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 51 |
| 77,8,2,3 | 61 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 52 |
| 78,8,2,3 | 62 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 53 |
| 79,8,2,3 | 63 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 55 |
| 80,8,2,3 | 64 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 56 |
| 81,8,2,3 | 66 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 58 |
| 82,8,2,3 | 68 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 59 |
| 83,8,2,3 | 69 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 61 |
| 84,8,2,3 | 70 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 62 |
| 85,8,2,3 | 72 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 63 |
| 86,8,2,3 | 74 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 65 |
| 87,8,2,3 | 76 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 67 |
| 88,8,2,3 | 77 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 68 |
| 89,8,2,3 | 77 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 70 |
| 90,8,2,3 | 81 | | already known design - Rebuilt by LDDr | 16-mag-2018 | Sum (v1+v2,k,t,m1+m2-1 | 71 |